A low pulse on this pin (below 1/3 of VCC) sets the internal flip-flop and makes the output go HIGH. When the voltage on this pin reaches 2/3 of VCC, it resets the flip-flop, and the output goes LOW.
This circuit emulates the functionality of the classic 555-Timer IC. It was designed using open-source tools and was taped-out in the Skywater 130nm CMOS process through TinyTapeout on April 19th 2024 ...
This code example deals with the watchdog timer (WDT) of PSOC™ 4. The watchdog timer operates in two modes: the interrupt mode and the reset mode. In the interrupt mode, the LED toggles every second.
Some results have been hidden because they may be inaccessible to you
Show inaccessible results